MIPS Instruction Review

• Load/Store: lw r1, 0(r3) (load r3 to r1) and sw r1, 4(r3) (store r1 to r3)
• Adds: add r5, r4, r3 (add r4 and r3 and put it in r5)
• Branches: beq r1, r2, label (branch to label if r1 == r2)
• Jump: j label (jump to label)
• RISC Architecture: Reduced Instruction Set Computing
  • Instructions are the same size
  • Load/store (operands are in registers for arithmetic)